1# Library to Find Best eBook for Read
Author : Padmaja Nagaiah
Release : 2012
Genre : Metal oxide semiconductor field-effect transistors
Kind : eBook
Book Rating : /5 ( reviews)
Book Synopsis Development of III-V P-MOSFETs with High-kappa Gate Stack for Future CMOS Applications by : Padmaja Nagaiah
Download or read book Development of III-V P-MOSFETs with High-kappa Gate Stack for Future CMOS Applications written by Padmaja Nagaiah. This book was released on 2012. Available in PDF, EPUB and Kindle. Book excerpt:
Author : Duygu Kuzum
Release : 2009
Genre :
Kind : eBook
Book Rating : /5 ( reviews)
Book Synopsis Interface-engineered Ge MOSFETs for Future High Performance CMOS Applications by : Duygu Kuzum
Download or read book Interface-engineered Ge MOSFETs for Future High Performance CMOS Applications written by Duygu Kuzum. This book was released on 2009. Available in PDF, EPUB and Kindle. Book excerpt: As the semiconductor industry approaches the limits of traditional silicon CMOS scaling, introduction of performance boosters like novel materials and innovative device structures has become necessary for the future of CMOS. High mobility materials are being considered to replace Si in the channel to achieve higher drive currents and switching speeds. Ge has particularly become of great interest as a channel material, owing to its high bulk hole and electron mobilities. However, replacement of Si channel by Ge requires several critical issues to be addressed in Ge MOS technology. High quality gate dielectric for surface passivation, low parasitic source/drain resistance and performance improvement in Ge NMOS are among the major challenges in realizing Ge CMOS. Detailed characterization of gate dielectric/channel interface and a deeper understanding of mobility degradation mechanisms are needed to address the Ge NMOS performance problem and to improve PMOS performance. In the first part of this dissertation, the electrical characterization results on Ge NMOS and PMOS devices fabricated with GeON gate dielectric are presented. Carrier scattering mechanisms are studied through low temperature mobility measurements. For the first time, the effect of substrate crystallographic orientation on inversion electron and hole mobilities is investigated. Direct formation of a high-k dielectric on Ge has not given good results in the past. A good quality interface layer is required before the deposition of a high-K dielectric. In the second part of this dissertation, ozone-oxidation process is introduced to engineer Ge/insulator interface. Electrical and structural characterizations and stability analysis are carried out and high quality Ge/dielectric interface with low interface trap density is demonstrated. Detailed extraction of interface trap density distribution across the bandgap and close to band edges of Ge, using low temperature conductance and capacitance measurements is presented. Ge N-MOSFETs have exhibited poor drive currents and low mobility, as reported by several different research groups worldwide. In spite of the increasing interest in Ge, the major mechanisms behind poor Ge NMOS performance have not been completely understood yet. In the last part of this dissertation, the results on Ge NMOS devices fabricated with the ozone-oxidation and the low temperature source/drain activation processes are discussed. These devices achieve the highest electron mobility to-date, about 1.5 times the universal Si mobility. Detailed interface characterizations, trapping analyses and gated Hall device measurements are performed to identify the mechanisms behind poor Ge NMOS performance in the past.
Author : Jacopo Franco
Release : 2013-10-19
Genre : Technology & Engineering
Kind : eBook
Book Rating : 632/5 ( reviews)
Book Synopsis Reliability of High Mobility SiGe Channel MOSFETs for Future CMOS Applications by : Jacopo Franco
Download or read book Reliability of High Mobility SiGe Channel MOSFETs for Future CMOS Applications written by Jacopo Franco. This book was released on 2013-10-19. Available in PDF, EPUB and Kindle. Book excerpt: Due to the ever increasing electric fields in scaled CMOS devices, reliability is becoming a showstopper for further scaled technology nodes. Although several groups have already demonstrated functional Si channel devices with aggressively scaled Equivalent Oxide Thickness (EOT) down to 5Å, a 10 year reliable device operation cannot be guaranteed anymore due to severe Negative Bias Temperature Instability. This book focuses on the reliability of the novel (Si)Ge channel quantum well pMOSFET technology. This technology is being considered for possible implementation in next CMOS technology nodes, thanks to its benefit in terms of carrier mobility and device threshold voltage tuning. We observe that it also opens a degree of freedom for device reliability optimization. By properly tuning the device gate stack, sufficiently reliable ultra-thin EOT devices with a 10 years lifetime at operating conditions are demonstrated. The extensive experimental datasets collected on a variety of processed 300mm wafers and presented here show the reliability improvement to be process - and architecture-independent and, as such, readily transferable to advanced device architectures as Tri-Gate (finFET) devices. We propose a physical model to understand the intrinsically superior reliability of the MOS system consisting of a Ge-based channel and a SiO2/HfO2 dielectric stack. The improved reliability properties here discussed strongly support (Si)Ge technology as a clear frontrunner for future CMOS technology nodes.
Author : Han Zhao
Release : 2010
Genre :
Kind : eBook
Book Rating : /5 ( reviews)
Book Synopsis A Study of Electrical and Material Characteristics of III-V MOSFETs and TFETs with High-[kappa] Gate Dielectrics by : Han Zhao
Download or read book A Study of Electrical and Material Characteristics of III-V MOSFETs and TFETs with High-[kappa] Gate Dielectrics written by Han Zhao. This book was released on 2010. Available in PDF, EPUB and Kindle. Book excerpt: The performance and power scaling of metal-oxide-semiconductor field-effect-transistors (MOSFETs) has been historically achieved through shrinking the gate length of transistors for over three decades. As Si complementary metal-oxide-semiconductor (CMOS) scaling is approaching the physical and optical limits, the emerging technology involves new materials for the gate dielectrics and the channels as well as innovative structures. III-V materials have much higher electron mobility compared to Si, which can potentially provide better device performance. Hence, there have been tremendous research activities to explore the prospects of III-V materials for CMOS applications. Nevertheless, the key challenges for III-V MOSFETs with high-[kappa] oxides such as the lack of high quality, thermodynamically stable insulators that passivate the gate oxide/III-V interface still hinder the development of III-V MOS devices. The main focus of this dissertation is to develop the proper processes and structures for III-V MOS devices that result in good interface quality and high device performance. Firstly, fabrication processes and device structures of surface channel MOSFETs were investigated. The interface quality of In[subscript 0.53]Ga[subscript 0.47]As MOS devices was improved by developing the gate-last process with more than five times lower interface trap density (D[subscript it]) compared to the ones with the gate-first process. Furthermore, the optimum substrate structure was identified for inversion-type In[subscript 0.53]Ga[subscript 0.47]As MOSFETs by investigating the effects of channel doping concentration and thickness on device performance. With the proper process and channel structures, the first inversion-type enhancement-mode In[subscript 0.53]Ga[subscript 0.47]As MOSFETs with equivalent oxide thickness (EOT) of ~10 Å using atomic layer deposited (ALD) HfO2 gate dielectric were demonstrated. The second part of the study focuses on buried channel InGaAs MOSFETs. Buried channel InGaAs MOSFETs were fabricated to improve the channel mobility using various barriers schemes such as single InP barrier with different thicknesses and InP/InAlAs double-barrier. The impacts of different high-[kappa] dielectrics were also evaluated. It has been found that the key factors enabling mobility improvement at both peak and high-field mobility in In[subscript 0.7]Ga[subscript 0.3]As quantum-well MOSFETs with InP/InAlAs barrier-layers are 1) the epitaxial InP/InAlAs double-barrier confining carriers in the quantum-well channel and 2) good InP/Al2O3/HfO2 interface with small EOT. Record high channel mobility was achieved and subthreshold swing (SS) was greatly improved. Finally, InGaAs tunneling field-effect-transistors (TFETs), which are considered as the next-generation green transistors with ultra-low power consumption, were demonstrated with more than two times higher on-current while maintaining much smaller SS compared to the reported results. The improvements are believed to be due to using the In[subscript 0.7]Ga[subscript 0.3]As tunneling junction with a smaller bandgap and ALD HfO2 gate dielectric with a smaller EOT.
Author : Alexander Nichau
Release : 2014-04-03
Genre :
Kind : eBook
Book Rating : 981/5 ( reviews)
Book Synopsis Characterization, integration and reliability of HfO2 and LaLuO3 high-κ/metal gate stacks for CMOS applications by : Alexander Nichau
Download or read book Characterization, integration and reliability of HfO2 and LaLuO3 high-κ/metal gate stacks for CMOS applications written by Alexander Nichau. This book was released on 2014-04-03. Available in PDF, EPUB and Kindle. Book excerpt:
