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Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects

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Release : 2016-07-29
Genre : Technology & Engineering
Kind : eBook
Book Rating : 372/5 ( reviews)

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Book Synopsis Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects by : Nuno Lourenço

Download or read book Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects written by Nuno Lourenço. This book was released on 2016-07-29. Available in PDF, EPUB and Kindle. Book excerpt: This book introduces readers to a variety of tools for automatic analog integrated circuit (IC) sizing and optimization. The authors provide a historical perspective on the early methods proposed to tackle automatic analog circuit sizing, with emphasis on the methodologies to size and optimize the circuit, and on the methodologies to estimate the circuit’s performance. The discussion also includes robust circuit design and optimization and the most recent advances in layout-aware analog sizing approaches. The authors describe a methodology for an automatic flow for analog IC design, including details of the inputs and interfaces, multi-objective optimization techniques, and the enhancements made in the base implementation by using machine leaning techniques. The Gradient model is discussed in detail, along with the methods to include layout effects in the circuit sizing. The concepts and algorithms of all the modules are thoroughly described, enabling readers to reproduce the methodologies, improve the quality of their designs, or use them as starting point for a new tool. An extensive set of application examples is included to demonstrate the capabilities and features of the methodologies described.

Speeding-Up Radio-Frequency Integrated Circuit Sizing with Neural Networks

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Release : 2023-03-20
Genre : Computers
Kind : eBook
Book Rating : 990/5 ( reviews)

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Book Synopsis Speeding-Up Radio-Frequency Integrated Circuit Sizing with Neural Networks by : João L. C. P. Domingues

Download or read book Speeding-Up Radio-Frequency Integrated Circuit Sizing with Neural Networks written by João L. C. P. Domingues. This book was released on 2023-03-20. Available in PDF, EPUB and Kindle. Book excerpt: In this book, innovative research using artificial neural networks (ANNs) is conducted to automate the sizing task of RF IC design, which is used in two different steps of the automatic design process. The advances in telecommunications, such as the 5th generation broadband or 5G for short, open doors to advances in areas such as health care, education, resource management, transportation, agriculture and many other areas. Consequently, there is high pressure in today’s market for significant communication rates, extensive bandwidths and ultralow-power consumption. This is where radiofrequency (RF) integrated circuits (ICs) come in hand, playing a crucial role. This demand stresses out the problem which resides in the remarkable difficulty of RF IC design in deep nanometric integration technologies due to their high complexity and stringent performances. Given the economic pressure for high quality yet cheap electronics and challenging time-to-market constraints, there is an urgent need for electronic design automation (EDA) tools to increase the RF designers’ productivity and improve the quality of resulting ICs. In the last years, the automatic sizing of RF IC blocks in deep nanometer technologies has moved toward process, voltage and temperature (PVT)-inclusive optimizations to ensure their robustness. Each sizing solution is exhaustively simulated in a set of PVT corners, thus pushing modern workstations’ capabilities to their limits. Standard ANNs applications usually exploit the model’s capability of describing a complex, harder to describe, relation between input and target data. For that purpose, ANNs are a mechanism to bypass the process of describing the complex underlying relations between data by feeding it a significant number of previously acquired input/output data pairs that the model attempts to copy. Here, and firstly, the ANNs disrupt from the most recent trials of replacing the simulator in the simulation-based sizing with a machine/deep learning model, by proposing two different ANNs, the first classifies the convergence of the circuit for nominal and PVT corners, and the second predicts the oscillating frequencies for each case. The convergence classifier (CCANN) and frequency guess predictor (FGPANN) are seamlessly integrated into the simulation-based sizing loop, accelerating the overall optimization process. Secondly, a PVT regressor that inputs the circuit’s sizing and the nominal performances to estimate the PVT corner performances via multiple parallel artificial neural networks is proposed. Two control phases prevent the optimization process from being misled by inaccurate performance estimates. As such, this book details the optimal description of the input/output data relation that should be fulfilled. The developed description is mainly reflected in two of the system’s characteristics, the shape of the input data and its incorporation in the sizing optimization loop. An optimal description of these components should be such that the model should produce output data that fulfills the desired relation for the given training data once fully trained. Additionally, the model should be capable of efficiently generalizing the acquired knowledge in newer examples, i.e., never-seen input circuit topologies.

Yield-Aware Analog IC Design and Optimization in Nanometer-scale Technologies

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Release : 2020-03-20
Genre : Technology & Engineering
Kind : eBook
Book Rating : 368/5 ( reviews)

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Book Synopsis Yield-Aware Analog IC Design and Optimization in Nanometer-scale Technologies by : António Manuel Lourenço Canelas

Download or read book Yield-Aware Analog IC Design and Optimization in Nanometer-scale Technologies written by António Manuel Lourenço Canelas. This book was released on 2020-03-20. Available in PDF, EPUB and Kindle. Book excerpt: This book presents a new methodology with reduced time impact to address the problem of analog integrated circuit (IC) yield estimation by means of Monte Carlo (MC) analysis, inside an optimization loop of a population-based algorithm. The low time impact on the overall optimization processes enables IC designers to perform yield optimization with the most accurate yield estimation method, MC simulations using foundry statistical device models considering local and global variations. The methodology described by the authors delivers on average a reduction of 89% in the total number of MC simulations, when compared to the exhaustive MC analysis over the full population. In addition to describing a newly developed yield estimation technique, the authors also provide detailed background on automatic analog IC sizing and optimization.

Using Artificial Neural Networks for Analog Integrated Circuit Design Automation

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Release : 2019-12-11
Genre : Technology & Engineering
Kind : eBook
Book Rating : 430/5 ( reviews)

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Book Synopsis Using Artificial Neural Networks for Analog Integrated Circuit Design Automation by : João P. S. Rosa

Download or read book Using Artificial Neural Networks for Analog Integrated Circuit Design Automation written by João P. S. Rosa. This book was released on 2019-12-11. Available in PDF, EPUB and Kindle. Book excerpt: This book addresses the automatic sizing and layout of analog integrated circuits (ICs) using deep learning (DL) and artificial neural networks (ANN). It explores an innovative approach to automatic circuit sizing where ANNs learn patterns from previously optimized design solutions. In opposition to classical optimization-based sizing strategies, where computational intelligence techniques are used to iterate over the map from devices’ sizes to circuits’ performances provided by design equations or circuit simulations, ANNs are shown to be capable of solving analog IC sizing as a direct map from specifications to the devices’ sizes. Two separate ANN architectures are proposed: a Regression-only model and a Classification and Regression model. The goal of the Regression-only model is to learn design patterns from the studied circuits, using circuit’s performances as input features and devices’ sizes as target outputs. This model can size a circuit given its specifications for a single topology. The Classification and Regression model has the same capabilities of the previous model, but it can also select the most appropriate circuit topology and its respective sizing given the target specification. The proposed methodology was implemented and tested on two analog circuit topologies.

Analog IC Placement Generation via Neural Networks from Unlabeled Data

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Release : 2020-06-30
Genre : Computers
Kind : eBook
Book Rating : 616/5 ( reviews)

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Book Synopsis Analog IC Placement Generation via Neural Networks from Unlabeled Data by : António Gusmão

Download or read book Analog IC Placement Generation via Neural Networks from Unlabeled Data written by António Gusmão. This book was released on 2020-06-30. Available in PDF, EPUB and Kindle. Book excerpt: In this book, innovative research using artificial neural networks (ANNs) is conducted to automate the placement task in analog integrated circuit layout design, by creating a generalized model that can generate valid layouts at push-button speed. Further, it exploits ANNs’ generalization and push-button speed prediction (once fully trained) capabilities, and details the optimal description of the input/output data relation. The description developed here is chiefly reflected in two of the system’s characteristics: the shape of the input data and the minimized loss function. In order to address the latter, abstract and segmented descriptions of both the input data and the objective behavior are developed, which allow the model to identify, in newer scenarios, sub-blocks which can be found in the input data. This approach yields device-level descriptions of the input topology that, for each device, focus on describing its relation to every other device in the topology. By means of these descriptions, an unfamiliar overall topology can be broken down into devices that are subject to the same constraints as a device in one of the training topologies. In the experimental results chapter, the trained ANNs are used to produce a variety of valid placement solutions even beyond the scope of the training/validation sets, demonstrating the model’s effectiveness in terms of identifying common components between newer topologies and reutilizing the acquired knowledge. Lastly, the methodology used can readily adapt to the given problem’s context (high label production cost), resulting in an efficient, inexpensive and fast model.

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